Invention Grant
- Patent Title: CMOS Vt control integration by modification of metal-containing gate electrodes
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Application No.: US14918503Application Date: 2015-10-20
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Publication No.: US09698020B2Publication Date: 2017-07-04
- Inventor: Genji Nakamura , Toshio Hasegawa
- Applicant: Tokyo Electron Limited
- Applicant Address: JP Tokyo
- Assignee: Tokyo Electron Limited
- Current Assignee: Tokyo Electron Limited
- Current Assignee Address: JP Tokyo
- Agency: Wood Herron & Evans LLP
- Main IPC: H01L21/3213
- IPC: H01L21/3213 ; H01L21/28 ; H01L29/51 ; H01L29/49 ; H01L21/8238
Abstract:
A method of forming a semiconductor device is disclosed in various embodiments. The method includes providing a substrate containing first and second device regions, and a high-k film on the substrate, depositing a metal nitride gate electrode film on the high-k film, forming a metal-containing gate electrode film on the metal nitride gate electrode film in the second device region but not in the first device region, and depositing a Si-based cap layer on the metal-containing gate electrode film in the second device region and on the metal nitride gate electrode film in the first device region.
Public/Granted literature
- US20160111290A1 CMOS Vt CONTROL INTEGRATION BY MODIFICATION OF METAL-CONTAINING GATE ELECTRODES Public/Granted day:2016-04-21
Information query
IPC分类:
