Invention Grant
- Patent Title: Conductor structure for three-dimensional semiconductor device
-
Application No.: US14846561Application Date: 2015-09-04
-
Publication No.: US09698080B2Publication Date: 2017-07-04
- Inventor: Wen-Chih Chiou , David Ding-Chung Lu
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Slater Matsil, LLP
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L21/768 ; H01L25/065 ; H01L25/00 ; H01L21/306 ; H01L23/00

Abstract:
A three-dimensional semiconductor device using redundant bonding-conductor structures to make inter-level electrical connections between multiple semiconductor chips is disclosed. A first chip, or other semiconductor substrate, forms a first active area on its upper surface, and a second chip or other semiconductor substrate forms a second active area on its upper surface. According to the present invention, when the second chip has been mounted above the first chip, either face-up or face-down, the first active area is coupled to the second active area by at least one redundant bonding-conductor structure. In one embodiment, each redundant bonding-conductor structure includes at least one via portion that extends completely through the second chip to perform this function. In another, the redundant bonding-conductor structure extends downward to the top level interconnect. The present invention also includes a method for making such a device.
Public/Granted literature
- US20150380341A1 Three-Dimensional Semiconductor Device Public/Granted day:2015-12-31
Information query
IPC分类: