A semiconductor integrated circuit device has a first N-channel type high withstanding-voltage MOS transistor and a second N-channel type high withstanding-voltage MOS transistor formed on an N-type semiconductor substrate. The first N-channel type high withstanding-voltage transistor includes a third N-type low-concentration impurity region containing arsenic having a depth smaller than a P-type well region in a drain region within the P-type well region, and the second N-channel type high withstanding-voltage MOS transistor includes a fourth N-type low-concentration impurity region that is adjacent to the P-type well region and has a bottom surface in contact with the N-type semiconductor substrate. In this manner, the high withstanding-voltage NMOS transistors are capable of operating at 30 V or higher and are integrated on the N-type semiconductor substrate.