- Patent Title: Method for manufacturing imaging apparatus, and imaging apparatus
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Application No.: US14894298Application Date: 2013-06-14
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Publication No.: US09698187B2Publication Date: 2017-07-04
- Inventor: Takahiro Tomimatsu
- Applicant: RENESAS ELECTRONICS CORPORATION
- Applicant Address: JP Tokyo
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: JP Tokyo
- Agency: Shapiro, Gabor and Rosenberger, PLLC
- International Application: PCT/JP2013/066444 WO 20130614
- International Announcement: WO2014/199509 WO 20141218
- Main IPC: H01L29/49
- IPC: H01L29/49 ; H01L27/146

Abstract:
A gate electrode of a field effect transistor is formed. Next, an offset spacer film with a double-layer structure including a silicon oxide film as a lower-layer film and a silicon nitride film as an upper-layer film is formed on a sidewall surface of the gate electrode. The silicon nitride film serves as a supply source of an element for terminating dangling bonds of silicon in a device formation region. Next, treatment for leaving the offset spacer film intact or treatment for removing the silicon nitride film of the offset spacer film is performed. Thereafter, a sidewall insulating film is formed on the sidewall surface of the gate electrode.
Public/Granted literature
- US20160111456A1 METHOD FOR MANUFACTURING IMAGING APPARATUS, AND IMAGING APPARATUS Public/Granted day:2016-04-21
Information query
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