Invention Grant
- Patent Title: Phase locked loop frequency calibration circuit and method
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Application No.: US15191457Application Date: 2016-06-23
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Publication No.: US09698799B2Publication Date: 2017-07-04
- Inventor: Ruijin Liu , Xu Zhang , Jingjing Tao , Jiejie Lv
- Applicant: SHANGHAI EASTSOFT MICROELECTRONICS CO., LTD.
- Applicant Address: CN Shanghai
- Assignee: SHANGHAI EASTSOFT MICROELECTRONICS CO., LTD.
- Current Assignee: SHANGHAI EASTSOFT MICROELECTRONICS CO., LTD.
- Current Assignee Address: CN Shanghai
- Agency: J.C. Patents
- Priority: CN201310724463 20131224
- Main IPC: H03L7/06
- IPC: H03L7/06 ; H03L7/10 ; H03L7/099 ; H03L7/089 ; H03L7/093 ; H03L7/181 ; H03L7/08

Abstract:
A phase locked loop frequency calibration circuit and a method are provided. The circuit includes a timer, a counter, a control module, a frequency divider and a voltage controlled oscillator; output of voltage controlled oscillator is connected with first input of frequency divider, output of frequency divider is connected with first input of counter, second input of frequency divider, first input of timer and second input of counter are respectively connected with first output of control module, third input of counter is connected with output of timer, output of counter is connected with first input of control module, a reference clock signal is respectively sent to second input of timer and second input of control module, the number of clocks used by frequency divider to perform frequency division on output clock signal of voltage controlled oscillator is sent to third input of control module.
Public/Granted literature
- US20160308542A1 PHASE LOCKED LOOP FREQUENCY CALIBRATION CIRCUIT AND METHOD Public/Granted day:2016-10-20
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