Invention Grant
- Patent Title: Pad structure
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Application No.: US13630185Application Date: 2012-09-28
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Publication No.: US09699897B2Publication Date: 2017-07-04
- Inventor: Szu-Ying Chen , Jeng-Shyan Lin , Dun-Nian Yaung , Jen-Cheng Liu , Chia-Wei Liu , Chung-Chuan Tseng
- Applicant: Taiwan Semiconductor Manufacturing Company Limited
- Applicant Address: TW
- Assignee: Taiwan Semiconductor Manufacturing Company Limited
- Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
- Current Assignee Address: TW
- Agency: Cooper Legal Group, LLC
- Main IPC: H01L23/522
- IPC: H01L23/522 ; H01L23/528 ; H05K1/02 ; H05K1/11 ; H01L23/00

Abstract:
One or more techniques or systems for mitigating peeling associated with a pad, such as a pad of a semiconductor, are provided herein. In some embodiments, a pad structure for mitigating peeling comprises a bond region located above a first region. In some embodiments, a first inter-layer dielectric region associated with the first region is formed in an inter-layer region under the pad. Additionally, a first inter-metal dielectric region associated with the first region is formed in an inter-metal region under the inter-layer region. In some embodiments, the first inter-metal region is formed under the first inter-layer region. In this manner, peeling associated with the pad structure is mitigated, at least because the first inter-metal dielectric region comprises dielectric material and the first inter-layer dielectric region comprises dielectric material, thus forming a dielectric-dielectric interface between the first inter-metal dielectric region and the inter-layer dielectric region.
Public/Granted literature
- US20140090882A1 PAD STRUCTURE Public/Granted day:2014-04-03
Information query
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