Method and device for differential signal channel length compensation in electronic system
Abstract:
Embodiments of the present invention are directed to providing a time delay to a shortened trace in a differential microstrip trace pair. By adding back metal to a ground plane associated with a DC blocking capacitor, a time delay can be added to the shortened trace. The cutout associated with the longer trace remains unaltered. In a further embodiment, both cutouts can be modified with the addition of metal, with the cutout associated with the shorter trace receiving more metal than the other cutout. In a further embodiment of the present invention, a cutout associated with a connector can be modified to add back metal in the cutout. The cutout associated with the shorter trace is modified while the other cutout is left unchanged.
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