Invention Grant
- Patent Title: Read cache memory with DRAM class promotion
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Application No.: US14282467Application Date: 2014-05-20
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Publication No.: US09710173B2Publication Date: 2017-07-18
- Inventor: Eugene Feng , Mathew Arcoleo
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Brooks, Cameron & Huebsch, PLLC
- Main IPC: G06F3/06
- IPC: G06F3/06 ; G06F12/08 ; G11C29/44 ; G06F12/10 ; G11C7/10 ; G06F12/0806 ; G06F12/1081 ; G11C29/00 ; G06F13/28 ; G06F12/0875 ; G06F12/0888 ; G11C29/04
Abstract:
The present disclosure includes methods and apparatuses for read cache memory. One apparatus includes a read cache memory apparatus comprising a first DRAM array, a first and a second NAND array, and a controller configured to manage movement of data between the DRAM array and the first NAND array, and between the first NAND array and the second NAND array.
Public/Granted literature
- US20150339064A1 READ CACHE MEMORY Public/Granted day:2015-11-26
Information query
