Invention Grant
- Patent Title: Low power high performance electrical circuits
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Application No.: US15201465Application Date: 2016-07-03
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Publication No.: US09711210B1Publication Date: 2017-07-18
- Inventor: Jeng-Jye Shau
- Applicant: Jeng-Jye Shau
- Main IPC: G11C11/00
- IPC: G11C11/00 ; G11C11/417 ; H01L27/092 ; H01L23/528 ; H01L29/78 ; H01L27/11 ; G06F17/50 ; G11C5/14

Abstract:
Hybrid circuits are CMOS circuits that can function in two different operation modes: a normal operation mode and a power saving mode. At normal operation mode, a hybrid circuit operates in the same ways as typical CMOS circuits. At power saving mode, the standby leakage current of the circuit is reduced significantly. Typically, most parts of a hybrid circuit stay in power saving mode. A circuit block is switched into normal operation mode when it needs to operate at full speed. The resulting circuits are capable of supporting ultra-low power operations without sacrificing performance. Hybrid circuits can be implemented on integrated circuits comprising multiple-gate MOS transistors.
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