Invention Grant
- Patent Title: Multilevel interconnect structure and methods of manufacturing the same
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Application No.: US15168486Application Date: 2016-05-31
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Publication No.: US09716062B2Publication Date: 2017-07-25
- Inventor: Shinsuke Yada , Hiroyuki Ogawa
- Applicant: SANDISK TECHNOLOGIES LLC
- Applicant Address: US TX Plano
- Assignee: SANDISK TECHNOLOGIES LLC
- Current Assignee: SANDISK TECHNOLOGIES LLC
- Current Assignee Address: US TX Plano
- Agency: The Murbury Law Group PLLC
- Main IPC: H01L29/788
- IPC: H01L29/788 ; H01L23/522 ; H01L27/11556 ; H01L27/11582 ; H01L27/11524 ; H01L27/1157 ; H01L21/768 ; H01L27/11575

Abstract:
A three-dimensional NAND device includes a first set of word line contacts in contact with a contact portion of respective odd numbered word lines in a first stepped word line contact region, and a second set of word line contacts in contact with a contact portion of respective even numbered word lines in a second stepped word line contact region. The even numbered word lines in the first word line contact region do not contact a word line contact while the odd numbered word lines in the second word line contact region do not contact a word line contact.
Public/Granted literature
- US20160276268A1 MULTILEVEL INTERCONNECT STRUCTURE AND METHODS OF MANUFACTURING THE SAME Public/Granted day:2016-09-22
Information query
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