Embodiments relate to a method of testing an integrated circuit. An aspect includes forming a PSRO on the integrated circuit. Another aspect includes a branch of a test signal distribution network, the test signal distribution network comprising a plurality of flushable pipeline latches, the test signal distribution network configured to deliver a test signal simultaneously, via the plurality of flushable pipeline latches, to each of a plurality of local clock buffers associated with components of the integrated circuit at a plurality of signal outputs. Another aspect includes an input multiplexer that outputs an oscillator signal to an input of a branch of the test signal distribution network. Another aspect includes a return path from a signal output of the branch of the test signal distribution network to the input multiplexer. Yet another aspect includes testing the integrated circuit by determining an oscillation frequency of the PSRO.