Block storage protocol to RAM bypass
Abstract:
Methods and systems are provided where a memory controller for non-volatile memory transfers data to and from random access memory over a second double data rate bus, and a host system access the random access memory over a first double data rate bus. The memory controller may transfer the data in response to a command received by the memory controller from a host system via a block storage protocol bus. Alternatively or in addition, the memory controller may transfer the data as part of caching data internal to the non-volatile memory.
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