Invention Grant
- Patent Title: Computing system with debug assert mechanism and method of operation thereof
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Application No.: US14921517Application Date: 2015-10-23
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Publication No.: US09720756B2Publication Date: 2017-08-01
- Inventor: Alexei Frolikov , Hwan Kim , Yangsup Lee
- Applicant: Samsung Electronics Co., Ltd.
- Applicant Address: KR Gyeonggi-Do
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR Gyeonggi-Do
- Agency: IP Investment Law Group
- Main IPC: G06F11/00
- IPC: G06F11/00 ; G06F11/07

Abstract:
A computing system includes: a volatile memory configured to: store a debug assert flag mask including bits; cores, coupled to the volatile memory, configured to: detect an error in at least one of the cores, set at least one of the bits corresponding to the cores with the error detected, collect debug information for each of the cores with the error detected, collect operating information for each of the cores without the error detected, generate assert dump information based on compiling the debug information; and a nonvolatile memory, coupled to at least one of the cores, configured to: store the assert dump information, the operating information, configured to by at least one of the cores.
Public/Granted literature
- US20160132382A1 COMPUTING SYSTEM WITH DEBUG ASSERT MECHANISM AND METHOD OF OPERATION THEREOF Public/Granted day:2016-05-12
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