Invention Grant
- Patent Title: Method and system for printed circuit board layout
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Application No.: US15079034Application Date: 2016-03-23
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Publication No.: US09721053B2Publication Date: 2017-08-01
- Inventor: Yung-Chien Cheng , Ming-Hui Lin , Yi-Hsin Hsieh , Yu-Jen Lin
- Applicant: Inventec (Pudong) Technology Corporation , INVENTEC CORPORATION
- Applicant Address: CN Shanghai TW Taipei
- Assignee: Inventec (Pudong) Technology Corporation,INVENTEC CORPORATION
- Current Assignee: Inventec (Pudong) Technology Corporation,INVENTEC CORPORATION
- Current Assignee Address: CN Shanghai TW Taipei
- Agency: CKC & Partners Co., Ltd.
- Priority: CN201510843244 20151126
- Main IPC: G06F17/50
- IPC: G06F17/50 ; H05K1/11

Abstract:
A system for printed circuit board layout includes a processing unit and a memory unit. The memory unit stores physical node data and virtual node data. The processing unit is electrically coupled to the memory unit and configured to execute steps of a method for printed circuit board layout. In particular, the physical node data of a printed circuit board (PCB) is acquired. The physical node data include a plurality of data structure and coordinate points of the physical nodes. The virtual node data of the PCB is acquired. The virtual node data include a plurality of data structure of the virtual nodes. A corresponding relation of the physical nodes and the virtual nodes is determined according to the physical node data and the virtual node data. The virtual nodes are disposed at the physical node coordinate points according to the corresponding relation.
Public/Granted literature
- US20170154145A1 METHOD AND SYSTEM FOR PRINTED CIRCUIT BOARD LAYOUT Public/Granted day:2017-06-01
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