Invention Grant
- Patent Title: Method of forming metal interconnection
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Application No.: US14829959Application Date: 2015-08-19
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Publication No.: US09721887B2Publication Date: 2017-08-01
- Inventor: Chao-Hsien Peng , Chih Wei Lu , Ming-Han Lee , Shau-Lin Shue
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD
- Current Assignee Address: TW Hsin-Chu
- Agency: Haynes and Boone, LLP
- Main IPC: H01L21/4763
- IPC: H01L21/4763 ; H01L23/528 ; H01L21/768 ; H01L23/522 ; H01L23/532

Abstract:
A method of fabricating a semiconductor device is disclosed. The method includes forming a dielectric layer over a substrate, forming a trench in the dielectric layer, forming a first barrier layer in the trench. The first barrier layer has a first portion disposed along sidewalls of the trench and a second portion disposed over a bottom of the trench. The method also includes applying an anisotropic plasma treatment to convert the second portion of the first barrier layer into a second barrier layer, removing the second barrier layer while the first portion of the first barrier layer is disposed along sidewalls of the trench. The method also includes forming a conductive feature in the trench.
Public/Granted literature
- US20170053864A1 Method of Forming Metal Interconnection Public/Granted day:2017-02-23
Information query
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