Invention Grant
- Patent Title: Semiconductor device using Ge channel and manufacturing method thereof
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Application No.: US14577209Application Date: 2014-12-19
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Publication No.: US09721951B2Publication Date: 2017-08-01
- Inventor: Keiji Ikeda , Tsutomu Tezuka , Yuuichi Kamimuta , Kiyoe Furuse
- Applicant: KABUSHIKI KAISHA TOSHIBA
- Applicant Address: JP Tokyo
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Tokyo
- Agency: Finnegan, Henderson, Farabow, Garrett & Dunner, LLP
- Priority: JP2012-138103 20120619
- Main IPC: H01L29/04
- IPC: H01L29/04 ; H01L29/10 ; H01L31/00 ; H01L27/092 ; H01L23/522 ; H01L27/02 ; H01L21/8238 ; H01L27/06 ; H01L25/065 ; H01L21/02 ; H01L21/324 ; H01L29/165 ; H01L29/49 ; H01L29/51 ; H01L27/12 ; H01L29/786

Abstract:
According to one embodiment, a semiconductor device includes a first complementary semiconductor device provided on a semiconductor substrate, and including a CMOS circuit, a metal electrode provided above the first complementary semiconductor device, a semiconductor layer provided above the metal electrode, including an nMOS region and a pMOS region separated from each other, and containing Ge; and a second complementary semiconductor device including an nMOSFET provided on the first portion of the semiconductor layer and a pMOSFET provided on the second portion of the semiconductor layer.
Public/Granted literature
- US20150102419A1 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF Public/Granted day:2015-04-16
Information query
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