Invention Grant
- Patent Title: Vertical DMOS transistor
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Application No.: US15013812Application Date: 2016-02-02
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Publication No.: US09722069B2Publication Date: 2017-08-01
- Inventor: Hideaki Tsuchiko
- Applicant: Alpha and Omega Semiconductor Incorporated
- Applicant Address: US CA Sunnyvale
- Assignee: Alpha and Omega Semiconductor Incorporated
- Current Assignee: Alpha and Omega Semiconductor Incorporated
- Current Assignee Address: US CA Sunnyvale
- Agency: Van Pelt, Yi & James LLP
- Main IPC: H01L29/78
- IPC: H01L29/78 ; H01L29/40 ; H01L29/417 ; H01L29/66 ; H01L29/08 ; H01L21/8234 ; H01L27/088 ; H01L21/265 ; H01L21/306 ; H01L27/092 ; H01L29/06
Abstract:
A transistor includes a semiconductor body; a body region of a first conductivity type formed in the semiconductor body; a gate electrode formed partially overlapping the body region and insulated from the semiconductor body by a gate dielectric layer; a source diffusion region of a second conductivity type formed in the body region on a first side of the gate electrode; a trench formed in the semiconductor body on a second side, opposite the first side, of the gate electrode, the trench being lined with a sidewall dielectric layer; and a doped sidewall region of the second conductivity type formed in the semiconductor body along the sidewall of the trench where the doped sidewall region forms a vertical drain current path for the transistor.
Public/Granted literature
- US20160149026A1 VERTICAL DMOS TRANSISTOR Public/Granted day:2016-05-26
Information query
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