Invention Grant
- Patent Title: Single synchronous FIFO in a universal asynchronous receiver/transmitter system
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Application No.: US14832016Application Date: 2015-08-21
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Publication No.: US09723384B2Publication Date: 2017-08-01
- Inventor: Abdulfattah Mohammad Obeid , Mohammed Sulaiman BenSaleh , Abdullah Alawi AlJuffri , Syed Manzoor Qasim
- Applicant: King Abdulaziz City for Science and Technology
- Applicant Address: SA Riyadh
- Assignee: KING ABDULAZIZ CITY FOR SCIENCE AND TECHNOLOGY
- Current Assignee: KING ABDULAZIZ CITY FOR SCIENCE AND TECHNOLOGY
- Current Assignee Address: SA Riyadh
- Agency: Roberts Mlotkowski Safran Cole & Calderon, P.C.
- Agent Andrew M. Calderon
- Main IPC: H04L27/00
- IPC: H04L27/00 ; H04Q11/00
Abstract:
A UART device includes a glue logic configured to receive data from either a computer processing unit (CPU) interface of the UART device or from a receiver interface of the UART device; determine whether the data was received from the CPU interface or the receiver interface; and add a most significant bit (MSB) to the data. A value of the MSB is based on whether the data was received from the CPU interface or the receiver interface. The UART device may write the data with the added MSB to a data buffering and storage component.
Public/Granted literature
- US20170054578A1 SINGLE SYNCHRONOUS FIFO IN A UNIVERSAL ASYNCHRONOUS RECEIVER/TRANSMITTER SYSTEM Public/Granted day:2017-02-23
Information query
