Invention Grant
- Patent Title: Methods of fabricating semiconductor devices including supporting patterns in gap regions between conductive patterns
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Application No.: US15093408Application Date: 2016-04-07
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Publication No.: US09741608B2Publication Date: 2017-08-22
- Inventor: Kyu-Hee Han , Sanghoon Ahn
- Applicant: Kyu-Hee Han , Sanghoon Ahn
- Applicant Address: KR
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR
- Agency: Myers Bigel, P.A.
- Priority: KR10-2012-0098464 20120905
- Main IPC: H01L21/768
- IPC: H01L21/768 ; H01L23/532 ; H01L23/522 ; H01L21/3105 ; H01L21/311 ; H01L23/528
Abstract:
An integrated circuit device includes spaced apart conductive patterns on a substrate surface, and a supporting pattern on the substrate surface between adjacent ones of the conductive patterns and separated therefrom by respective gap regions. The adjacent ones of the conductive patterns extend away from the substrate surface beyond a surface of the supporting pattern therebetween. A capping layer is provided on respective surfaces of the conductive patterns and the surface of the supporting pattern. Related fabrication methods are also discussed.
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