Invention Grant
- Patent Title: Semiconductor device including dual-layer source/drain region
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Application No.: US14948492Application Date: 2015-11-23
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Publication No.: US09748336B2Publication Date: 2017-08-29
- Inventor: Kangguo Cheng , Robert H. Dennard , Zhen Zhang
- Applicant: International Business Machines Corporation
- Applicant Address: US NY Armonk
- Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Current Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Current Assignee Address: US NY Armonk
- Agency: Cantor Colburn LLP
- Agent Vazken Alexanian
- Main IPC: H01L21/336
- IPC: H01L21/336 ; H01L29/08 ; H01L29/66 ; H01L21/324 ; H01L21/225 ; H01L21/02 ; H01L29/165 ; H01L29/167 ; H01L29/45 ; H01L29/78

Abstract:
A semiconductor device includes a semiconductor substrate having a channel region interposed between a first active region and a second active region, and a gate structure formed on the channel region. A first dual-layer source/drain region is on the first active region and a second dual-layer source/drain region is on the second active region. The first and second dual-layer source/drain regions include stacked layers formed of different semiconductor materials. A first extension region is embedded in the first active region and a second extension region is embedded in the second active region.
Public/Granted literature
- US20170104065A1 SEMICONDUCTOR DEVICE INCLUDING DUAL-LAYER SOURCE/DRAIN REGION Public/Granted day:2017-04-13
Information query
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