Invention Grant
- Patent Title: Calculation device and calculation method
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Application No.: US15254413Application Date: 2016-09-01
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Publication No.: US09748954B2Publication Date: 2017-08-29
- Inventor: Masahiko Toichi
- Applicant: FUJITSU LIMITED
- Applicant Address: JP Kawasaki
- Assignee: FUJITSU LIMITED
- Current Assignee: FUJITSU LIMITED
- Current Assignee Address: JP Kawasaki
- Agency: Fujitsu Patent Center
- Priority: JP2015-207977 20151022
- Main IPC: H03K19/00
- IPC: H03K19/00 ; H03K19/177

Abstract:
A calculation device includes a programmable logic device including a plurality of circuit arrangement areas each to which power supply voltage allowed to be independently controlled is supplied and a calculation circuit coupled to the programmable logic device. The calculation circuit arranges a main circuit that executes specific processing in a first circuit arrangement area included in the plurality of circuit arrangement areas, acquires a second circuit arrangement area in which a sub circuit that executes the specific processing is allowed to be arranged, included in the plurality of circuit arrangement areas and in which the main circuit is not arranged, arranges the sub circuit in the second circuit arrangement area, and causes one of the main circuit and the sub circuit to execute the specific processing.
Public/Granted literature
- US20170117892A1 CALCULATION DEVICE AND CALCULATION METHOD Public/Granted day:2017-04-27
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