A voltage metering module for metering a voltage signal at least one analogue to digital converter (ADC) component arranged to receive at an input thereof a voltage signal and to generate a digital signal representative of the received voltage signal. The at least one ADC component includes at least one sampling network controllable to sample the received voltage signal for conversion to a digital signal representative of the received voltage signal and at least one compensation network operably coupled in parallel with the sampling network and controllable to sample the received voltage signal such that an input current of the compensation network at least partially compensates for a component of an input current of the sampling network.