Implementing signal integrity fail recovery and mainline calibration for DRAM
Abstract:
A method, system and memory controller are provided for implementing signal integrity fail recovery and mainline calibration for Dynamic Random Access Memory (DRAM). After identifying a failed DRAM, the DRAM is marked as bad and taken out of mainline operation. Characterization tests and periodic calibrations are run to evaluate optimal settings and to determine if the marked DRAM is recoverable. If recoverable, the marked DRAM chip is redeployed. If unrecoverable, error reporting is provided to the user.
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