Invention Grant
- Patent Title: Semiconductor device and method of manufacturing semiconductor device
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Application No.: US15087427Application Date: 2016-03-31
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Publication No.: US09754816B2Publication Date: 2017-09-05
- Inventor: Yoshihiro Hayashi , Naoya Inoue , Kishou Kaneko
- Applicant: Renesas Electronics Corporation
- Applicant Address: JP Kawasaki-shi, Kanagawa
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: JP Kawasaki-shi, Kanagawa
- Agency: McGinn IP Law Group, PLLC
- Priority: JP2008-318098 20081215
- Main IPC: H01L21/44
- IPC: H01L21/44 ; H01L21/768 ; H01L21/28 ; H01L27/12 ; H01L29/423 ; H01L29/792 ; H01L29/41 ; H01L29/49 ; H01L29/51 ; H01L29/786 ; H01L29/66 ; H01L29/24

Abstract:
The method of manufacturing a semiconductor device, including preparing a semiconductor substrate, forming a first insulating layer over said semiconductor substrate, forming first grooves in the first insulating film, forming a gate electrode and a first interconnect in the first grooves, respectively, forming a gate insulating film over the gate electrode, forming a semiconductor layer over the gate insulating, forming a second insulating layer over the semiconductor layer and the first insulating film, forming a via in the second insulating layer, and forming a second interconnect such that the second interconnect is connected to the semiconductor layer through the via. The gate electrode, the first interconnect and the second interconnect are formed by Cu or Cu alloy, respectively.
Public/Granted literature
- US20160211173A1 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE Public/Granted day:2016-07-21
Information query
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