Invention Grant
- Patent Title: Integrated circuitry
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Application No.: US14992280Application Date: 2016-01-11
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Publication No.: US09754879B2Publication Date: 2017-09-05
- Inventor: Zailong Bian
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Wells St. John, P.S.
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L23/52 ; H01L29/40 ; H01L23/528 ; H01L21/768 ; H01L21/285 ; H01L23/532 ; H01L23/522
Abstract:
A method of fabricating integrated circuitry includes forming a first conductive line. First elemental tungsten is deposited directly against an elevationally outer surface of the first conductive line selectively relative to any exposed non-conductive material. Dielectric material is formed elevationally over the first conductive line and a via is formed there-through to conductive material of the first conductive line at a location where the first tungsten was deposited. Second elemental tungsten is non-selectively deposited to within the via and electrically couples to the first conductive line. A second conductive line is formed elevationally outward of and electrically coupled to the second tungsten that is within the via.
Public/Granted literature
- US20160126181A1 Methods of Fabricating Integrated Circuitry Public/Granted day:2016-05-05
Information query
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