Invention Grant
- Patent Title: Semiconductor structure with anti-efuse device
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Application No.: US14926880Application Date: 2015-10-29
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Publication No.: US09754903B2Publication Date: 2017-09-05
- Inventor: Suraj K. Patil , Min-hwa Chi , Ajey Poovannummoottil Jacob
- Applicant: GLOBALFOUNDRIES Inc.
- Applicant Address: KY Grang Cayman
- Assignee: GLOBALFOUNDRIES INC.
- Current Assignee: GLOBALFOUNDRIES INC.
- Current Assignee Address: KY Grang Cayman
- Agency: Heslin Rothenberg Farley & Mesiti P.C.
- Agent Wayne F. Reinke, Esq.
- Main IPC: H01L21/00
- IPC: H01L21/00 ; H01L23/62

Abstract:
A semiconductor structure includes a dielectric layer, a silicidable metal layer and an undoped filler material layer are used to create an anti-efuse device. The anti-efuse device may be situated in a dielectric layer of an interconnect structure for a semiconductor device or may be planar. Where part of an interconnect structure, the anti-efuse device may be realized by causing a current to flow therethrough while applying local heating. Where planar, the filler material may be situated between extensions of metal pads and metal atoms caused to move from the extensions to the filler material layer using a current flow and local heating.
Public/Granted literature
- US20170125361A1 SEMICONDUCTOR STRUCTURE WITH ANTI-EFUSE DEVICE Public/Granted day:2017-05-04
Information query
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