Invention Grant
- Patent Title: Method for reduced source and drain contact to gate stack capacitance
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Application No.: US14972824Application Date: 2015-12-17
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Publication No.: US09755030B2Publication Date: 2017-09-05
- Inventor: Carl John Radens , Richard Quimby Williams
- Applicant: International Business Machines Corporation
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agent Jeffrey S LaBaw; Steven J Meyers
- Main IPC: H01L29/41
- IPC: H01L29/41 ; H01L29/417 ; H01L29/45 ; H01L23/528 ; H01L23/532 ; H01L21/306 ; H01L21/768 ; H01L21/683 ; H01L21/027

Abstract:
A structure and method for fabricating a semiconductor device is described. A device structure including a gate structure, a source region and a drain region is disposed on a first surface of a substrate. Contact holes are etched through the source and drain regions and through a first portion of the substrate. The contact holes are filled with a conductive material to produce contact studs coupled to the source and drain regions. A second portion of the substrate is removed. A surface of the contact studs is exposed through a second surface of the substrate opposite to the gate structure for connection to a wiring layer disposed over the second surface of the substrate.
Public/Granted literature
- US20170179240A1 METHOD FOR REDUCED SOURCE AND DRAIN CONTACT TO GATE STACK CAPACITANCE Public/Granted day:2017-06-22
Information query
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