Invention Grant
- Patent Title: Semiconductor devices having source/drain regions with strain-inducing layers and methods of manufacturing such semiconductor devices
-
Application No.: US15378178Application Date: 2016-12-14
-
Publication No.: US09755076B2Publication Date: 2017-09-05
- Inventor: Seok-hoon Kim , Jin-bum Kim , Kwan-heum Lee , Byeong-chan Lee , Cho-eun Lee , Su-jin Jung
- Applicant: Samsung Electronics Co., Ltd.
- Applicant Address: KR
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR
- Agency: Myers Bigel, P.A.
- Priority: KR10-2014-0095008 20140725
- Main IPC: H01L29/78
- IPC: H01L29/78 ; H01L21/02 ; H01L29/06 ; H01L29/10 ; H01L29/165 ; H01L29/66 ; H01L27/092 ; H01L21/8238 ; H01L29/417 ; H01L27/088 ; H01L21/8234

Abstract:
Semiconductor devices include a strain-inducing layer capable of applying a strain to a channel region of a transistor included in a miniaturized electronic device, and a method of manufacturing the semiconductor device. The semiconductor device includes a substrate having a channel region; a pair of source/drain regions provided on the substrate and arranged on both sides of the channel region in a first direction; and a gate structure provided on the channel region and comprising a gate electrode pattern extending in a second direction that is different from the first direction, a gate dielectric layer disposed between the channel region and the gate electrode pattern, and a gate spacer covering respective lateral surfaces of the gate electrode pattern and the gate dielectric layer. At least one of the source/drain regions includes a first strain-inducing layer and a second strain-inducing layer. The first strain-inducing layer is disposed between a lateral surface of the channel region and the second strain-inducing layer and contacts at least a portion of the gate dielectric layer.
Public/Granted literature
Information query
IPC分类: