Invention Grant
- Patent Title: Method for fabricating MRAM bits on a tight pitch
-
Application No.: US15280094Application Date: 2016-09-29
-
Publication No.: US09755141B2Publication Date: 2017-09-05
- Inventor: Jordan A. Katine
- Applicant: Western Digital Technologies, Inc.
- Applicant Address: US CA San Jose
- Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
- Current Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
- Current Assignee Address: US CA San Jose
- Agency: Patterson & Sheridan, LLP
- Main IPC: H01L27/22
- IPC: H01L27/22 ; H01L43/12 ; H01L43/02 ; H01L43/10

Abstract:
A method for fabricating magnetoresistive random access memory (MRAM) devices on a tight pitch is provided. The method generally includes etching a pattern of columns into a hardmask layer disposed on a magnetic tunnel junction (MTJ) disposed on a substrate having electrically conductive contacts, the MTJ comprising a tunnel barrier layer between first and second ferromagnetic layers, the pattern of columns aligned to the electrically conductive contacts; etching the first ferromagnetic layer to expose the tunnel barrier layer and to form columns comprising the hardmask layer and the first ferromagnetic layer; forming a passivation layer on the exposed tunnel barrier layer and on top side surfaces of the columns; and etching the passivation layer on the exposed tunnel barrier layer, the exposed tunnel barrier layer, and the second ferromagnetic layer to form columns comprising the hardmask layer, the first ferromagnetic layer, the tunnel barrier layer, and the second ferromagnetic layer.
Public/Granted literature
- US20170018707A1 METHOD FOR FABRICATING MRAM BITS ON A TIGHT PITCH Public/Granted day:2017-01-19
Information query
IPC分类: