Invention Grant
- Patent Title: Current source logic gate
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Application No.: US15373689Application Date: 2016-12-09
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Publication No.: US09755645B1Publication Date: 2017-09-05
- Inventor: Michael J. Krasowski , Norman F. Prokop
- Applicant: The United States of America as represented by the Administrator of NASA
- Applicant Address: US DC Washington
- Assignee: The United States of America as Represented by the Administrator of National Aeronautics and Space Administration
- Current Assignee: The United States of America as Represented by the Administrator of National Aeronautics and Space Administration
- Current Assignee Address: US DC Washington
- Agent Robert H. Earp, III
- Main IPC: H03K19/20
- IPC: H03K19/20 ; H03K19/0952 ; H03K19/094

Abstract:
A current source logic gate with depletion mode field effect transistor (“FET”) transistors and resistors may include a current source, a current steering switch input stage, and a resistor divider level shifting output stage. The current source may include a transistor and a current source resistor. The current steering switch input stage may include a transistor to steer current to set an output stage bias point depending on an input logic signal state. The resistor divider level shifting output stage may include a first resistor and a second resistor to set the output stage point and produce valid output logic signal states. The transistor of the current steering switch input stage may function as a switch to provide at least two operating points.
Information query
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