• Patent Title: High throughput packet state processing
  • Application No.: US14512766
    Application Date: 2014-10-13
  • Publication No.: US09756154B1
    Publication Date: 2017-09-05
  • Inventor: Weirong Jiang
  • Applicant: Xilinx, Inc.
  • Applicant Address: US CA San Jose
  • Assignee: XILINX, INC.
  • Current Assignee: XILINX, INC.
  • Current Assignee Address: US CA San Jose
  • Agent Gerald Chan; David O'Brien
  • Main IPC: H04L29/08
  • IPC: H04L29/08 H04L29/06
High throughput packet state processing
Abstract:
A system for processing data includes a filtering module having a plurality of processing units, a state accumulator, and a merging network coupled to the processing units and the state accumulator. Each processing unit is configured to output a set of two sub-state vectors and a packet continuance indicator. The state accumulator is configured to store a state resulted from previous processing cycles by the processing units. The merging network is configured to output a master state vector based at least in part on the set of two sub-state vectors, the stored state, and the packet continuance indicators output from the processing units.
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