Invention Grant
- Patent Title: Device embedded substrate and manufacturing method of device embedded substrate
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Application No.: US14760982Application Date: 2013-01-18
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Publication No.: US09756732B2Publication Date: 2017-09-05
- Inventor: Yasuaki Seki , Tomoyuki Nagata , Mitsuaki Toda
- Applicant: MEIKO ELECTRONICS CO., LTD.
- Applicant Address: JP Ayase-shi, Kanagawa
- Assignee: MEIKO ELECTRONICS CO., LTD.
- Current Assignee: MEIKO ELECTRONICS CO., LTD.
- Current Assignee Address: JP Ayase-shi, Kanagawa
- Agency: Marshall, Gerstein & Borun LLP
- International Application: PCT/JP2013/050984 WO 20130118
- International Announcement: WO2014/112108 WO 20140724
- Main IPC: H05K1/18
- IPC: H05K1/18 ; H05K1/11 ; H05K1/02 ; H05K3/00 ; H01L23/00 ; H01L23/522 ; H05K3/30 ; H05K3/46

Abstract:
A device embedded substrate (20), includes: an insulation layer (12) including an insulation resin material; an electric or electronic device (4) embedded in the insulation layer (12); a terminal (15) serving as an electrode included in the device (4); a conductor pattern (18) formed on the surface of the insulation layer (12); and a conducting via (21) for electrically connecting the conductor pattern (18) and the terminals (15) with each other. The conducting via (21) is made up of a large-diameter section (21a) having a large diameter and a small-diameter section (21b) having a smaller diameter than that of the large-diameter section (21a), in order starting from the conductor pattern (18) toward the terminal (15). A stepped section (17) is formed between the large-diameter section (21a) and the small-diameter section (21b). The large-diameter section (21a) is formed so as to penetrate a sheet-shaped glass cloth (11) disposed in the insulation layer (12).
Public/Granted literature
- US20150327369A1 Device Embedded Substrate and Manufacturing Method of Device Embedded Substrate Public/Granted day:2015-11-12
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