Invention Grant
- Patent Title: Parallelizing compile method, parallelizing compiler, parallelizing compile apparatus, and onboard apparatus
-
Application No.: US14302886Application Date: 2014-06-12
-
Publication No.: US09760355B2Publication Date: 2017-09-12
- Inventor: Hiroshi Mori , Mitsuhiro Tani , Hironori Kasahara , Keiji Kimura , Dan Umeda , Akihiro Hayashi , Hiroki Mikami , Yohei Kanehagi
- Applicant: DENSO CORPORATION , WASEDA UNIVERSITY
- Applicant Address: JP Kariya JP Tokyo
- Assignee: DENSO CORPORATION,WASEDA UNIVERSITY
- Current Assignee: DENSO CORPORATION,WASEDA UNIVERSITY
- Current Assignee Address: JP Kariya JP Tokyo
- Agency: Nixon & Vanderhye PC
- Priority: JP2013-125607 20130614
- Main IPC: G06F9/45
- IPC: G06F9/45

Abstract:
A parallelizing compile method includes, dividing a sequential program for an embedded system into multiple macro tasks, specifying (i) a starting end task and (ii) a termination end task, fusing (i) the starting end task, (ii) the termination end task, and (iii) a group of the multiple macro tasks, extracting a group of multiple new macro tasks from the multiple new macro tasks fused in the fusing based on a data dependency, performing a static scheduling assigning the multiple new macro tasks to the multiple processor units, so that the group of the multiple new macro tasks is parallelly executable by the multiple processor units, and generating a parallelizing program. In addition, a parallelizing compiler, a parallelizing compile apparatus and an onboard apparatus are provided.
Public/Granted literature
Information query