Invention Grant
- Patent Title: Memory control circuit for controlling memory device that operates in self-refresh mode, and method of controlling the same
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Application No.: US15243170Application Date: 2016-08-22
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Publication No.: US09761301B2Publication Date: 2017-09-12
- Inventor: Junnosuke Kataoka
- Applicant: CANON KABUSHIKI KAISHA
- Applicant Address: JP Tokyo
- Assignee: CANON KABUSHIKI KAISHA
- Current Assignee: CANON KABUSHIKI KAISHA
- Current Assignee Address: JP Tokyo
- Agency: Rossi, Kimms & McDowell LLP
- Priority: JP2015-167004 20150826
- Main IPC: G11C11/4076
- IPC: G11C11/4076 ; G11C11/4096 ; G06F13/16 ; G11C11/4074 ; G11C5/14 ; G11C11/406 ; G11C11/4072

Abstract:
A memory control circuit capable of holding a memory device in a self-refresh mode even when a memory controller is powered off and then restarted. The controller performs data memory reset processing including deleting data in a buffer of a volatile memory device which operates when supplied with power from a first power supply, by changing an effective memory reset signal after the voltage of a second power supply becomes equal to or higher than a predetermined value. The memory reset signal is masked when an effective mask signal is generated. Whether to keep the data is determined when an event occurs which makes the voltage of the second power supply lower than the reset reference value and the first power supply is on. The memory reset signal is masked by making the mask signal effective when the data is determined to be kept.
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