Invention Grant
- Patent Title: Semiconductor memory device
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Application No.: US15253520Application Date: 2016-08-31
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Publication No.: US09761318B1Publication Date: 2017-09-12
- Inventor: Shigeo Kondo
- Applicant: Toshiba Memory Corporation
- Applicant Address: JP Tokyo
- Assignee: Toshiba Memory Corporation
- Current Assignee: Toshiba Memory Corporation
- Current Assignee Address: JP Tokyo
- Agency: Patterson & Sheridan, LLP
- Priority: JP2016-047472 20160310
- Main IPC: G11C16/10
- IPC: G11C16/10 ; G11C16/30 ; G11C16/08 ; G11C16/26 ; G11C16/34

Abstract:
A memory device capable of narrowing the threshold voltage distribution thereof includes word lines, bit lines, memory cells, a word line driver configured to apply voltage to a selected word line, a sense amplifier circuit configured to detect data of the memory cell, and a controller configured to control the word line driver and the sense amplifier. A write sequence includes a write operation in which write voltage is applied to the selected word line by the word line driver, and a verify operation in which, when a threshold voltage of the selected memory cell reaches a reference voltage, writing to the selected memory cell is completed. Based on second data that is written later than the first data to an adjacent memory cell adjacent to the selected memory cell, the controller changes the reference voltage used for completing the writing to the selected memory cell.
Public/Granted literature
- US20170263326A1 SEMICONDUCTOR MEMORY DEVICE Public/Granted day:2017-09-14
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