Invention Grant
- Patent Title: Self-aligned interconnects formed using substractive techniques
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Application No.: US13987667Application Date: 2013-08-20
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Publication No.: US09761489B2Publication Date: 2017-09-12
- Inventor: Bencherki Mebarki , Huixiong Dai , Yongmei Chen , He Ren , Mehul Naik
- Applicant: Applied Materials, Inc.
- Applicant Address: US CA Santa Clara
- Assignee: APPLIED MATERIALS, INC.
- Current Assignee: APPLIED MATERIALS, INC.
- Current Assignee Address: US CA Santa Clara
- Agent Shirley L. Church Esq
- Main IPC: H01L21/768
- IPC: H01L21/768 ; H01L21/3213 ; H01L23/532
Abstract:
A method of forming an interconnect structure for semiconductor or MEMS structures at a 10 nm Node (16 nm HPCD) down to 5 nm Node (7 nm HPCD), or lower, where the conductive contacts of the interconnect structure are fabricated using solely subtractive techniques applied to conformal layers of conductive materials.
Public/Granted literature
- US20150056800A1 Self-aligned interconnects formed using substractive techniques Public/Granted day:2015-02-26
Information query
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