Invention Grant
- Patent Title: Shallow trench isolation structure with raised portion between active areas and manufacturing method thereof
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Application No.: US14718841Application Date: 2015-05-21
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Publication No.: US09761658B2Publication Date: 2017-09-12
- Inventor: Cong-Min Fang , Kang-Min Kuo , Shi-Min Wu
- Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee Address: TW Hsinchu
- Agency: Maschoff Brennan
- Main IPC: H01L21/70
- IPC: H01L21/70 ; H01L29/06 ; H01L21/762
Abstract:
A semiconductor structure includes a semiconductor substrate, a first active area, a second active area, a first trench, at least one raised portion, and a first dielectric. The first active area is in the semiconductor substrate. The second active area is in the semiconductor substrate. The first trench is in the semiconductor substrate and separates the first active area and the second active area from each other. The raised portion is raised from the semiconductor substrate and is disposed in the first trench. The first dielectric is in the first trench and covers the raised portion.
Public/Granted literature
- US20160190240A1 SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF Public/Granted day:2016-06-30
Information query
IPC分类:
