A vertical Hall sensor circuit comprises an arrangement comprising a vertical Hall effect region of a first doping type, formed within a semiconductor substrate and having a stress dependency with respect to a Hall effect-related electrical characteristic. The vertical Hall sensor circuit further comprises a stress compensation circuit which comprises at least one of a lateral resistor arrangement and a vertical resistor arrangement. The lateral resistor arrangement has a first resistive element and a second resistive element, which are parallel to a surface of the semiconductor substrate and orthogonal to each other, for generating a stress-dependent lateral resistor arrangement signal on the basis of a reference signal inputted to the stress compensation circuit. The vertical resistor arrangement has a third resistive element of the first doping type for vertically conducting an electric current flow, for generating a stress-dependent vertical resistor arrangement signal on the basis of the reference signal. The vertical Hall sensor circuit further comprises a first circuit for providing a first signal to the arrangement, the first signal being based on at least one of the stress-dependent lateral resistor arrangement signal and the stress-dependent vertical resistor arrangement signal.