Invention Grant
- Patent Title: Wafer stack protection seal
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Application No.: US15224680Application Date: 2016-08-01
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Publication No.: US09768089B2Publication Date: 2017-09-19
- Inventor: Ranjan Rajoo , Kai Chong Chan
- Applicant: GLOBALFOUNDRIES Singapore Pte. Ltd.
- Applicant Address: SG Singapore
- Assignee: GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Current Assignee: GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Current Assignee Address: SG Singapore
- Agency: Horizon IP Pte. Ltd.
- Main IPC: H01L23/10
- IPC: H01L23/10 ; H01L21/683 ; H01L21/56 ; H01L23/00

Abstract:
A semiconductor wafer stack and a method of forming a semiconductor device is disclosed. The method includes providing a wafer stack with first and second wafers bonded together. The wafers include edge and non-edge regions, and at least one of the first and second wafers includes devices formed in the non-edge region. The first wafer serves as the base wafer while the second wafer serves as the top wafer of the wafer stack, where the base wafer is wider than the top wafer, providing a step edge of the wafer stack. An edge protection seal is formed on the wafer stack, where first and second layers are deposited on the wafer stack including at the top wafer and step edge of the wafer stack. The portion of the first and second layers on the step edge of the wafer stack forms the edge protection seal which protects the devices in the wafer stack in subsequent processing.
Public/Granted literature
- US20160343629A1 WAFER STACK PROTECTION SEAL Public/Granted day:2016-11-24
Information query
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