Invention Grant
- Patent Title: Substrate design for semiconductor packages and method of forming same
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Application No.: US14304331Application Date: 2014-06-13
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Publication No.: US09768090B2Publication Date: 2017-09-19
- Inventor: Yu-Min Liang , Mirng-Ji Lii , Jiun Yi Wu
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Slater Matsil, LLP
- Main IPC: H01L23/13
- IPC: H01L23/13 ; H01L23/14 ; H01L25/065 ; H01L23/00 ; H01L23/538 ; H01L21/48 ; H01L21/56 ; H05K3/46 ; H05K1/18 ; H01L23/367 ; H01L23/42 ; H01L23/498 ; H01L23/31 ; H05K1/02 ; H05K3/00

Abstract:
An embodiment device package includes a package substrate and a first and a second die bonded to the package substrate. The package substrate includes a build-up portion comprising a first contact pad and a plurality of bump pads. The package substrate further includes an organic core attached to the build-up portion, a through-via electrically connected to the first contact pad and extending through the organic core, a second contact pad on the through-via, a connector on the second contact pad, and a cavity extending through the organic core. The cavity exposes the plurality of bump pads, and the first die is disposed on the cavity and is bonded to the plurality of bump pads.
Public/Granted literature
- US20150235915A1 Substrate Design for Semiconductor Packages and Method of Forming Same Public/Granted day:2015-08-20
Information query
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