An embodiment of this invention is directed to an information processing apparatus capable of performing high-speed processing and preventing memory shortage even when executing a hybrid application. According to the embodiment, an information processing apparatus that executes a program including a first program layer with an instruction set to be interpreted and executed by a processor and a second program layer with an instruction set interpreted in advance by a unit other than the processor includes the following arrangement. That is, the processor includes a plurality of interpretation units configured to interpret the first program layer. A first interpretation unit is provided in an operating system that operates in the processor, and a second interpretation unit is provided in the second program layer.