Invention Grant
- Patent Title: Predicting semiconductor package warpage
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Application No.: US14672331Application Date: 2015-03-30
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Publication No.: US09772268B2Publication Date: 2017-09-26
- Inventor: Stephen P. Ayotte , Eric G. Liniger , Travis S. Longenbach
- Applicant: International Business Machines Corporation
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agent Steven J. Meyers
- Main IPC: G01N3/42
- IPC: G01N3/42 ; G01M5/00 ; G01N3/20 ; G01N33/00 ; G01R31/28

Abstract:
A method for predicting the electrical functionality of a semiconductor package, the method includes performing a first stiffness test for a first semiconductor package, receiving failure data for the first semiconductor package, the failure data includes results of an electrical test performed after the first semiconductor package is assembled on a printed circuit board, generating a database comprising results of the first stiffness test as a function of the failure data for the first semiconductor package, performing a second stiffness test for a second semiconductor package, identifying a unique result from the results of the first stiffness test in the database, the unique result aligns with a result of the second stiffness test, and predicting a failure data for the second semiconductor package based on the failure data for the first semiconductor package which corresponds to the unique result of the first stiffness test identified in the database.
Public/Granted literature
- US20160290905A1 PREDICTING SEMICONDUCTOR PACKAGE WARPAGE Public/Granted day:2016-10-06
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