Invention Grant
- Patent Title: Semiconductor integrated circuit and method for manufacturing the same
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Application No.: US15023351Application Date: 2014-10-01
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Publication No.: US09772461B2Publication Date: 2017-09-26
- Inventor: Yasuyuki Suzuki , Kenichiro Yashiki , Kazuhiko Kurata
- Applicant: Photonics Electronics Technology Research Association
- Applicant Address: JP Tokyo
- Assignee: PHOTONICS ELECTRONICS TECHNOLOGY RESEARCH ASSOCIATION
- Current Assignee: PHOTONICS ELECTRONICS TECHNOLOGY RESEARCH ASSOCIATION
- Current Assignee Address: JP Tokyo
- Agency: Michael Best & Friedrich LLP
- Priority: JP2013-206966 20131002
- International Application: PCT/JP2014/076306 WO 20141001
- International Announcement: WO2015/050167 WO 20150409
- Main IPC: G02B6/12
- IPC: G02B6/12 ; G02B6/136 ; G02B6/42 ; G02B6/122 ; H01L25/065 ; H01L25/07 ; H01L25/18 ; G02F1/025

Abstract:
A semiconductor integrated circuit that reduces a loss in an electrical signal and a method for manufacturing the semiconductor integrated circuit are provided. The semiconductor integrated circuit comprises a first region on which an optical circuit is to be formed and a second region on which an electrical signal wiring is to be formed. The first region comprises an Si substrate (502), a BOX layer (504) formed on the Si substrate (502), a first SOI layer (506) formed as an optical circuit on the BOX layer (504), and a first SiO2 layer (508) formed on the first SOI layer (506). The second region comprises the Si substrate (502), the BOX layer (504), a second SiO2 layer (508) formed on the BOX layer (504), and an electrical signal wiring (510) formed on the second SiO2 layer (508).
Public/Granted literature
- US20160266333A1 SEMICONDUCTOR INTEGRATED CIRCUIT AND METHOD FOR MANUFACTURING THE SAME Public/Granted day:2016-09-15
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