Invention Grant
- Patent Title: Semiconductor die singulation method using varied carrier substrate temperature
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Application No.: US15248382Application Date: 2016-08-26
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Publication No.: US09773689B2Publication Date: 2017-09-26
- Inventor: Gordon M. Grivna
- Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
- Applicant Address: US AZ Phoenix
- Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
- Current Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
- Current Assignee Address: US AZ Phoenix
- Agent Kevin B. Jackson
- Main IPC: H01L21/30
- IPC: H01L21/30 ; H01L21/67 ; H01L21/78 ; H01L21/683

Abstract:
In one embodiment, die are singulated from a wafer having a back layer by placing the wafer onto a first carrier substrate with the back layer adjacent the carrier substrate, forming singulation lines through the wafer to expose the back layer within the singulation lines, and using a mechanical device to apply localized pressure to the wafer to separate the back layer in the singulation lines. The localized pressure can be applied through the first carrier substrate proximate to the back layer, or can be applied through a second carrier substrate attached to a front side of the wafer opposite to the back layer. A support structure is used to heat and/or cool at least the first carrier-substrate while the localized pressure is applied.
Public/Granted literature
- US20160379850A1 SEMICONDUCTOR DIE SINGULATION METHOD Public/Granted day:2016-12-29
Information query
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