Some embodiments include memory arrays having rows of fins. Each fin includes a first pedestal, a second pedestal and a trench between the first and second pedestals. A first source/drain region is within the first pedestal, a second source/drain region is within the second pedestal, and a channel region is along the trench between the first and second pedestals. The rows are subdivided amongst deep-type (D) rows and shallow-type (S) rows, with the deep-type rows having deeper channel regions than the shallow-type rows. Some embodiments include rows of fins in which the channel regions along individual rows are subdivided amongst deep-type (D) channel regions and shallow-type (S) channel regions, with the deep-type channel regions being below the shallow-type channel regions.