Invention Grant
- Patent Title: Combo amorphous and LTPS transistors
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Application No.: US15278510Application Date: 2016-09-28
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Publication No.: US09773921B2Publication Date: 2017-09-26
- Inventor: Peter Nunan , Xuena Zhang
- Applicant: Applied Materials, Inc.
- Applicant Address: US CA Santa Clara
- Assignee: APPLIED MATERIALS, INC.
- Current Assignee: APPLIED MATERIALS, INC.
- Current Assignee Address: US CA Santa Clara
- Agency: Patterson + Sheridan LLP
- Main IPC: H01L29/78
- IPC: H01L29/78 ; H01L21/02 ; H01L29/786 ; H01L29/66 ; H01L21/324 ; H01L21/266 ; H01L21/268
Abstract:
The present disclosure generally relates to an improved large area substrate thin film transistor device, and method of fabrication thereof. More specifically, amorphous and LTPS transistors are formed by first forming an amorphous silicon layer, annealing the amorphous silicon layer to form polycrystalline silicon, depositing a masking layer over a first portion of the polycrystalline silicon layer, implanting a second portion of the polycrystalline silicon layer with an amorphizing species, and removing the masking layer.
Public/Granted literature
- US20170125606A1 COMBO AMORPHOUS AND LTPS TRANSISTORS Public/Granted day:2017-05-04
Information query
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