According to one aspect, embodiments of the invention provide an overstress indicator circuit comprising a sense circuit configured to monitor a parameter of a device and generate a sense signal corresponding to the parameter, a detection circuit coupled to the sense circuit and configured to receive the sense signal from the sense circuit and generate a detection signal at a first level in response to a determination that the sense signal is indicative of an overstress condition in the device, an interface circuit, and a memory circuit coupled to the detection circuit and the interface circuit and configured to store an overstress condition indication for access via the interface circuit in response to receiving the detection signal at the first level.