An image sensing device includes: a clock signal control block suitable for generating first and second clock control signals to have variable logic combinations for each unit row time; a frequency division block suitable for generating first and second clock signals having different phases based on a reference clock signal and controlling a first delay time reflected in the first clock signal and a second delay time reflected in the second clock signal for each unit row time based on the first and a second clock control signals; and a pixel signal processing block suitable for converting a pixel signal inputted for each unit row time into a digital signal based on the first and second clock signals.