Invention Grant
- Patent Title: Thin film transistor array substrate and manufacturing method thereof
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Application No.: US15487587Application Date: 2017-04-14
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Publication No.: US09778530B2Publication Date: 2017-10-03
- Inventor: Xiangyang Xu
- Applicant: Shenzhen China Star Optoelectronics Technology Co., Ltd.
- Applicant Address: CN Shenzhen, Guangdong
- Assignee: Shenzhen China Star Optoelectronics Technology Co., Ltd
- Current Assignee: Shenzhen China Star Optoelectronics Technology Co., Ltd
- Current Assignee Address: CN Shenzhen, Guangdong
- Agent Andrew C. Cheng
- Priority: CN201510166111 20150409
- Main IPC: H01L21/00
- IPC: H01L21/00 ; G02F1/1368 ; G02F1/1333 ; G02F1/1343 ; H01L29/66 ; H01L27/12 ; H01L29/49 ; H01L29/786

Abstract:
A thin film transistor array substrate includes a bottom gate disposed on a substrate and a bottom gate insulating layer covering the bottom gate, a semiconductor oxide layer disposed on the bottom gate insulating layer and an etch blocking layer covering the semiconductor oxide layer and including a first via, a drain disposed on the etch blocking layer and contacting with the semiconductor oxide layer through the first via and an insulating protection layer covering the drain, a second via arranged in the insulating protection layer, the etch blocking layer and the bottom gate insulating layer, a top gate disposed on insulating protection layer and contacting with the bottom gate through the second via. A method for manufacturing the thin film transistor array substrate is also disclosed. The thin film transistor prevents the threshold voltage thereof from being drifted in a case of negative bias illumination stress (NBIS).
Public/Granted literature
- US20170219863A1 THIN FILM TRANSISTOR ARRAY SUBSTRATE AND MANUFACTURING METHOD THEREOF Public/Granted day:2017-08-03
Information query
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