Invention Grant
- Patent Title: Calibrating charge mismatch in a baseline correction circuit
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Application No.: US14731385Application Date: 2015-06-04
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Publication No.: US09778804B2Publication Date: 2017-10-03
- Inventor: Chunbo Liu , Rafael Betancourt , Tae-Song Chung , Steve Chikin Lo
- Applicant: SYNAPTICS INCORPORATED
- Applicant Address: US CA San Jose
- Assignee: SYNAPTICS INCORPORATED
- Current Assignee: SYNAPTICS INCORPORATED
- Current Assignee Address: US CA San Jose
- Agency: Patterson + Sheridan, LLP
- Main IPC: G06F3/044
- IPC: G06F3/044 ; G06F3/041

Abstract:
Various embodiments provide a processing module that calibrates a current-mode baseline correction system to account for features in an input device that lead to “offset” in output of a charge integrator used for sensing presence of an input object. The offset is a difference between a common mode voltage, which is the average voltage output of the charge integrator over a sensing cycle and a mid-rail voltage midway between high and low power supply voltages. Calibration is performed by adjusting an N-side and/or P-side current flow duration parameter until common mode voltage falls within a low offset window in which the offset is deemed to be sufficiently close to the mid-rail voltage. The resulting duration parameters are stored and used for current-mode baseline corrections when operating an associated sensor electrode for capacitive sensing.
Public/Granted literature
- US20160357299A1 CALIBRATING CHARGE MISMATCH IN A BASELINE CORRECTION CIRCUIT Public/Granted day:2016-12-08
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